Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.
We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.
Location: Palo Alto, CA or Austin, TX
Here's what you will do
Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available licensed NVM technologies from foundries
Involve in NVM architecture for optimum performance and area of Analog Compute Engine
Design and verify the new circuits to handshake with the analog computation and the digital controlling blocks
Design, optimize and verify the NVM circuits and functional blocks (including and not limited to high voltage generator block, x-path, y-path, test and peripheral circuits) at the full chip level
Responsible for NVM full chip circuit simulation setup, debugging, and verification
Responsible for RNM and functional model of NVM circuits for verification
Participate in RNM and functional model of NVM circuits for computational software
Work closely with the validation engineers to expedite the silicon evaluation process and backend teams for the production qualification releases
Here's the background we hope you will have
Hands-on experience in NVM embedded or NVM product design, verification and production
Hands-on experience in NVM full chip circuit simulation setup, debugging, and verification
Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling
Familiar and hands-on experience some or all memory circuit block design: decoder, high voltage switches, charge pumps, HV and LV regulator, bandgap, high performance low power sense amp, monitoring, and BIST capability
Good understanding & knowledge of semiconductor device physics, and advanced process technology
Experienced in multiple generations NVM tapeout activities, layout supervision, chip planning, silicon debugging
Excellent communication skills, ability to work well across multi-functional teams
Fluent in all major CAD tools: SPICE, Cadence Virtuoso, Verilog simulation software
Some knowledge of scripting such as Python
Must be a self-starter, detail-oriented, and team player
Ph.D. or MS degree in EE or related 5-10+ years of semiconductor memory industrial experience
The following would be nice to have, but is not required
Experience working at fluid fast-paced startups
Experience in process integration, semiconductor reliability and product qualification of NVM technology
Experience in Semiconductor Emerging Non-volatile Memory Technologies such as RRAM, MRAM and others
Experience in cross-functional team development with a multi-technology foundry environment
