Posted 3 months ago
Design Engineer ( FV )
AI Summary
A Design Engineer (FV) plans, implements, and validates full-chip functional verification flows for ERP/BI solutions, owning testbench development, coverage-driven verification, and debug.
About this role
Design Engineer ( FV )
Squircle IT Consulting Services is a leading IT solutions and servicesBangalore company established with a specific mission of providing comprehensive, top of the line solutions around ERP and BI. Since its inception in November, 2007, SQUIRCLE has emerged as a key player in ERP and BI space. SQUIRCLE brings together the best Technology and Domain expertise in PeopleSoft to offer a full spectrum of services ranging from Implementation, Business Consulting to Support.
lient Qualcomm
Required Key Words Full Chip FV, RTL - RTL FV, RTL - Netlist FV,
Skills Design Engineer ( FV )
Exp. Level 3.5- Yrs
# of Position 10
Work Location (also mention if we can consider relocation) Bangalore
Max PR for Candidate 12.00 LPA
Interview Mode F2F Interview only
No Telephonic + No Skype
Interview location & Data 5-March -2016 Saturday
Remarks (if any) – deadline to share profiles /walk-in deadline/etc Should have good expertise in Full Chip FV, RTL - RTL FV, RTL - Netlist FV, Conformal ECO, Non-EQ debug
Additional Information
Skills
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