
Posted 1 month ago
HPC Optimization and Performance Model Engineer(Fixed Term Contract)
AI Summary
Develops analytical performance models and microbenchmark suites for HPC systems, characterizing machine architectures to enable autotuning and co-design of parallel algorithms.
About this role
About Us: At Huawei Technologies Switzerland AG, we are a leading technology firm dedicated to developing cutting-edge solutions that redefine industry standards and push technological boundaries. Our core focus is on creating advanced computing architectures that can efficiently support and enhance the performance of artificial intelligence systems. We believe in innovation as a driving force for improvement and are committed to achieving excellence in all areas of research and development.
General
Usually the performance of libraries on modern hardware is still determined by measurement: implementations are chosen by benchmarking and their parameters by search or heuristics; neither result are portable to arbitrary hardware. Our team works towards developing an approach to determine it analytically instead, with an arbitrary machine model (for any system) and a parametrized representation for algorithms, which we compose to predict performance, enable autotuning and guide co-design.
Key Responsibilities:
• System characterization & micro benchmarking - develop a microbenchmark suite for machine model coefficients:
o Explore options for encoding and initializing machine characteristics: transfer costs, latencies, synchronization overheads, and compute rates.
o Measurement methodology: how raw timings become model coefficients — fit quality, run-to-run variance, outlier handling, and reproducibility across machines.
o Coverage of matrix/tensor engines and mixed- and low-precision arithmetic, rather than inferring their roofs from SIMD
o New backends (GPU or accelerator) and extension of the measured hierarchy to inter-node levels
• Implementation side: Extend current GraphBLAS backends and model application
o Dense linear-algebra implementation, integration and model-validation/co-design.
o Explore cost-model-driven autotuning: predicting blocking, thread count, and data placement ahead of execution.
Requirements:
• MSc or PhD in Computer Science, Engineering, or a related technical discipline
• Strong knowledge of computer architecture and solid parallel processing: memory hierarchies, OpenMP (or similar), NUMA, SIMD etc.
• Strong C/C++ programing skills for architecture/parallel processing and some python for orchestration and analysis
• Experience in benchmarking & performance engineering for parallel code
• Research experience in one of:
o Analytical performance modeling: Roofline(s), Communication modeling(Hockney, LogP etc), Machine models (BSP, Multi-BSP)
o Dense or sparse linear-algebra libraries and kernel optimization (BLAS/GEMM, GraphBLAS)
o Applied statistics and numerical methods: regression and robust estimation, experiment design, portability, reproducibility etc.
o Distributed execution(MPI etc), GPU/accelerator programming, or Autotuning
What We Offer:
· Competitive salary and benefits package.
· Opportunities for professional growth and development.
· Be part of innovative projects that make a difference.
· Access to state-of-the-art technology and tools.
Skills
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