Posted 3 months ago
Low Power Formal Verification
AI Summary
The candidate will perform low-power formal verification for semiconductor designs, focusing on advanced constraint verification, post-layout static timing analysis, and constraint development.
About this role
Low Power Formal Verification
Greetings!!
Aarna HR Solutions is a Human Resource Recruitment Company providing services to Various IT, ITES and Non- IT companies across India. Aarna HR Solutions strive towards hiring the best and the brightest talent in the industry. We hire individuals with a strong sense of pride in their performance, team spirit, and a desire to excel.
We have immediate openings for one of our Semiconductor Client for Bangalore location.
Qualification: BE/B.Tech/ME/M.Tech
Experience: 5-10 yrs
Location- Bangalore
Job Description
• Work Experience in Advanced Constraint Verification & post-layout STA
• Expertise in Low Power Formal Verification
• Expertise in Constraint Development (Functional, DFT)
• Knowledge on IP constraint on DDR3/4, Multiprotocol SerDes, ARM core and Subsystem, USB3.0 etc a big plus
• Expertise in MCMM definitions
• Knowledge in Abstraction definition and creation (ETM/ILM/Hyperscale)
• Knowledge on Extraction & PTSI pruning parameter definitions
• FILL aware timing strategies/flow definition
• DMSA and ECO strategy definitions
• Clock scaling Analysis
If interested please send your UPDATED Profile with below mentioned details.
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Please Note:
This is a mass mail. If this profile is not suitable to you, then please ignore this mail or refer someone who may be suitable
With Regards,
Reshmi
Aarna HR Solutions
HR Recruiter
Mob No: 9902579718
Additional Information
All your information will be kept confidential according to EEO guidelines.
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