Open since May 2026
PCB Design Engineer – Altium / Schematic & LayoutE-Space · Saratoga
PCB Design Engineer – Altium / Schematic & Layout
SaratogaOn-siteFull-time
AI Summary
Designs and executes high-layer-count digital and mixed-signal PCBs using Altium Designer, owning the full lifecycle from schematic capture through manufacturing release while ensuring signal integrity, power integrity, and DFM compliance.
About this role
Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!
E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems.
We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.
We are seeking a hands-on PCB Design Engineer with deep expertise in schematic capture and PCB layout using Altium Designer. This role focuses on high-quality board design execution, robust system integration, and Design for Excellence (DFX)—this is not an RF/circuit design role, but RF/circuit experience is nice to have.
The ideal candidate is fluent in translating complex system requirements into production-ready, high-layer-count schematics and layouts for digital and mixed-signal systems.
Key Responsibilities
- End-to-End Design Ownership: Own the entire PCB lifecycle from initial concept and schematic capture through layout, routing, and manufacturing release.
- Altium Execution: Develop and maintain complex multi-layer PCB layouts and schematics within Altium Designer.
- Signal & Power Integrity: Design multi-layer boards with strict adherence to high-speed signal integrity, robust power distribution networks (PDN), and proper grounding strategies.
- Documentation & NPI: Generate complete fabrication and assembly packages, including Gerber/ODB++ files, BOMs, and manufacturing drawings.
- Cross-Functional Collaboration: Partner closely with hardware, FPGA, firmware, and mechanical engineering teams to seamlessly integrate system constraints.
- Vendor Management: Coordinate directly with fabrication and assembly vendors to proactively resolve DFM/DFT issues.
- Library & Revisions: Manage component selection, maintain the ECAD library, and support board bring-up, debugging, and iterative design revisions.
Required Qualifications
- Altium Mastery: Proven, hands-on experience with advanced PCB layout and schematic capture specifically in Altium Designer.
- Complex Board Design: Experience successfully designing high-layer-count (e.g., 6+ layers), high-density digital and mixed-signal boards.
- Hardware Fundamentals: Deep understanding of stack-up planning, high-speed routing practices, differential pair routing, and impedance control.
- EMI/EMC & Power: Strong grasp of EMI/EMC-aware layout techniques, power distribution, and decoupling strategies.
- Manufacturability: Solid familiarity with PCB fabrication processes, assembly constraints, and DFM guidelines.
- Autonomy: Ability to work independently, manage tight deadlines, and navigate multiple concurrent board revisions.
Nice to Have (Preferred Skills)
- Experience routing high-speed interfaces (e.g., DDR4/5, PCIe, JESD204, Ethernet, or multi-gigabit serial links).
- Experience working with FPGA-based architectures and complex pin-swapping/constraints.
- Familiarity with thermal management strategies and tight mechanical/enclosure integration.
- Exposure to embedded systems architecture and localized DC-DC power supply layouts
Skills
Altium DesignerBoM GenerationDecouplingDFMDifferential Pair RoutingEMI/EMC LayoutGerberHigh-speed RoutingImpedance ControlMulti-layer PCB DesignODB++PCB LayoutPower Distribution NetworkSchematic CaptureSignal IntegrityStack-up Planning
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