Senior Design Verification Engineer - Bangalore
AI Summary
Verifies complex digital systems and SoC blocks using SystemVerilog, UVM, and formal methods; collaborates with architects and engineers to define verification plans, debug hardware-software issues, and ensure correctness, performance, and safety.
About this role
Role Overview
Responsibilities
● Develop and execute verification strategies for key portions of the Velaura SoC.
● Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies.
● Collaborate with architects and RTL engineers to define verification plans, coverage goals, and correctness criteria.
● Verify compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and other critical SoC infrastructure.
● Perform HW/SW co-verification involving firmware, drivers, runtime software, and operating system interactions.
● Verify performance, latency, bandwidth, QoS, and real-time system behavior under representative workloads.
● Develop assertions, checkers, scoreboards, and automated verification infrastructure.
● Participate in emulation, FPGA prototyping, and pre-silicon software bring-up activities.
● Drive bug investigation, root-cause analysis, and debug across hardware and software boundaries.
● Post-silicon debug and root cause analysis.
● Leverage modern engineering tools, including AI-assisted verification workflows, to improve productivity, quality, and coverage.
● Contribute to a culture of technical excellence and continuous improvement.
Required Qualifications
● 10+ Years of experience verifying complex digital systems.
● Strong understanding of CDC issues, clocking and reset verification.
● Experience with SystemVerilog, UVM, C/C++, assertions, coverage-driven verification, and related methodologies.
● Experience with emulation, FPGA prototyping, or pre-silicon validation environments.
● Understanding of memory systems, interconnect fabrics, caches, DMA engines, processors, or accelerator architectures.
● Experience debugging complex system-level issues.
● Ability to work effectively in a collaborative, multidisciplinary engineering environment.
Preferred Qualifications
● Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.
● Experience verifying QoS, latency-sensitive, or real-time systems.
● Experience with HW/SW co-verification and system-level validation.
● Exposure to performance modeling, profiling, and workload characterization.
● Experience using modern AI tools and workflows to accelerate engineering productivity.
● Background in CPUs, GPUs, AI accelerators, networking and communications silicon, storage and data movement architectures, robotics and autonomous systems, automotive and ADAS platforms, aerospace and defense systems,
real-time and safety-critical computing, or functional safety architectures and methodologies.
Compensation & Benefits
At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a base salary and very competitive equity compensation, allowing team members to share in the company’s long-term success.
The base pay listed represents a good faith estimate that the Company reasonably expects to pay for this position at the time of hire. Actual compensation will depend on multiple factors, including the candidate's skills, qualifications, relevant experience, and geographic location.
In addition to base salary and equity compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.
Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.
Skills
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