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Rigetti Computing

Posted 3 months ago

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Senior FPGA Architect, Control Systems

Berkeley, CAOn-siteFull-time

AI Summary

Senior FPGA Architect designs and implements high-performance FPGA-based control systems for Rigetti’s quantum processors, collaborating with hardware, firmware, and software teams to build low-latency control pipelines and testable verification flows.

About this role

Rigetti is seeking a Senior FPGA Architect to join the development of FPGA-based control hardware used to drive our quantum processors. In this role, you will define FPGA architectures, implement high-performance digital logic, and collaborate closely with hardware, firmware, and quantum engineering teams to build scalable, low-latency control systems.

Responsibilities

  • Develop and improve a custom microprocessor responsible for waveform generation and critical logic to operate a quantum computer
  • Work closely with hardware, firmware, and software teams to define architecture, data flow, and interfaces.
  • Implement, simulate, and verify designs including DSP pipelines, control logic, and high-speed I/O.
  • Optimize designs for latency, resource utilization, and robustness in production environments.
  • Develop and maintain testbenches, verification flows, and CI.
  • Support bring-up, lab validation, and debugging in collaboration with Quantum Engineering on actual quantum computers.
  • Contribute to the long-term roadmap for the architecture of Rigetti’s control systems.

    • Requirements

  • Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or related field, or equivalent practical experience.
  • 7+ years of experience in FPGA design and development for complex mixed signal systems.
  • Experience architecting a new design from the ground-up
  • Proficiency in Verilog and/or VHDL, along with experience using an industry-standard FPGA toolchain (Xilinx, Intel/Altera, or similar).
  • Strong understanding of at least one of processor architecture design (memory bandwidth, caches, instruction decoding latency, etc.) and/or digital signal processing (filter design and implementation, IIR, FIR, FFT, polyphase filters, multi-rate systems).
  • Experience with high-speed serial interfaces (e.g., PCIe, JESD, SERDES).
  • Solid understanding of digital design fundamentals: timing closure, CDC, reset strategies, resource utilization, and verification.
  • Experience collaborating on cross-functional teams

    • Preferred Qualifications

  • Experience with RF/microwave or mixed-signal systems
  • Familiarity with ASIC design
  • Experience with real-time control systems, data acquisition, or instrumentation.
  • Exposure to quantum computing, test and measurement equipment, and the scientific python stack.

    • Skills

    CDCCICPU Architecture Concepts (memory Bandwidth, Caches, Latency)Data Flow And Interface DefinitionDigital Design FundamentalsDSP PipelinesFFTFIRFPGA Toolchains (Xilinx/Intel/Altera)High-speed Serial Interfaces (PCIe, JESD, SERDES)IIRLab ValidationMicroprocessor DesignMulti-rate SystemsPolyphase FiltersReset StrategiesResource UtilizationTestbenchesTiming ClosureVerificationVerilogVHDLWaveform Generation

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