Senior/Staff Process Engineer (Flip Chip)
AI Summary
Senior/Staff Process Engineer owning flip chip process development and technical support for silicon photonic wafers, including DOE, material qualification, reliability validation, failure analysis, and process optimization.
About this role
Core Responsibilities
Owns the process development and technical support of the Flip Chip process for silicon photonic chip wafers, with OSAT or internal line. Process may include plasma cleaning, flux engineering, pick & place, reflow, underfill, curing and/or TCB/NCP flux-less flow.
DOE to characterize process window and margin. Optimize process integration with upstream processes (e.g. bump/FO) to increase yield and manufacturability.
Material Characterization & Selection: Evaluate and qualify new manufacturing raw materials, including NCP, flux, underfill etc, as applicable.
Design and execute DOE plans to characterize thermal and mechanical stress. Lead reliability validations including Temperature Cycling Test (TCT), Unbiased Highly Accelerated Stress Test (HAST) and High-Temperature Storage (HTS).
Failure Analysis & Debug: Own the root-cause diagnostics of structural failure modes unique to FC (e.g. flux void, residue, misalignment, die warpage, reflow anomaly, underfill void etc), and formulate improvement solutions.
Manage incoming material quality control, establish SPC control plans and monitor process variation to ensure long-term process stability.
Compile process SOP, WI, process failure reports and engineering change documents; support NPI new product introduction and process verification.
Key Requirements & Qualifications
Education: Bachelor or Master degree in Materials Science, Chemical Engineering, Mechanical Engineering, Microelectronics, or an equivalent technical discipline.
Experience: 5+ years of hands-on industry experience in flip chip assembly.
Technical Knowledge:
Deep practical understanding of plasma cleaning, flux engineering, pick & place, reflow, underfill, curing and/or TCB/NCP flux-less flow.
Comprehensive command of finite element simulation principles regarding warpage, thermal dissipation, and structural mechanical integrity.
Solid working expertise with industry validation methodologies including FMEA, SPC controls, and structured 8D problem-solving tools.
Software Tools: High proficiency with robust analytical platforms like JMP, Minitab.
Skills
Explore related jobs
More jobs at Lumilens
Similar DOE jobs
Jobs in Singapore
- Manager, Business DevelopmentDelivery Hero · Singapore, Singapore
- Senior / Cloud Platform EngineerNCS · Singapore, Singapore
Internship Opportunity - SingaporeFrost & Sullivan · Singapore- Senior Executive, CommercialAECOM · Singapore, Singapore
Food & Beverage Attendant / CaptainAccorhotel · Singapore, Singapore- Senior Project ManagerKeppel Seghers Engineering Singapore Pte. Ltd. · Singapore
Browse these categories
Market data for this role
All reports →- SeriesRole reportsOne role family at a time: how many openings, what changed this week, who is hiring, what it pays.
- SeriesSalary reportsWhat employers publish in job postings, by level and workplace. Not self-reported pay.
- Market overviewState of tech hiring, September 2026: up 4.8%Tech hiring rose 4.8% month over month in September 2026, with 411,122 new listings. Customer support and account executive roles led the growth.
