Sr. FPGA Engineer (Contract-Perm)

Requirements

• 10+Years experience:
• FPGA/Modem Design
• Ultrascale+ & Versal
• Strong Design skills in VHDL & Verilog
• Extensive experience w/Bring-up
• Verilog and Python based Simulations
• Solid background in networking using ETH/IP/UDP
• PCIE
• Working with Xilinx FPGAs (Versal, Ultrascale+)
• Highly collaborative working with solid integration skills
• Solid H/W background

Nice to Have:

• Active Government Clearance **Not Required **
• Strong Software Defined Radio/Modem Design background
• Background in RF design
• Encryption experience
• Petalinux experience
• Versal,Verdi

Benefits

• A2e Does NOT Accept Unsolicited Resumes or Referrals from any source other than the candidate, and, as a result, we will not be considering any unsolicited referrals or resumes sent to us as a fee -based candidate submittal.
• Any unsolicited resumes sent to A2e, including unsolicited resumes sent to a A2e mailing address, fax machine or email address, directly to A2e employees, or to A2e’s resume database will be considered A2e property.
• A2e will NOT pay a fee for any placement resulting from the receipt of an unsolicited resume.