Posted 1 month ago
Sr Staff Engineer - Analog IC
AI Summary
Leads the design and development of high-accuracy analog and mixed-signal ICs for force sensing and haptic drivers, acts as technical lead on cross-functional projects, and mentors junior engineers.
About this role
Our Team:
Semtech’s Force and Haptic team specialize in force sensor AFEs, integrated force sensors, and haptic drivers. With a strong track record of innovation and global collaboration, the team plays a critical role in delivering industry-leading IC products.
Responsibilities:
Lead the design and development of high-accuracy analog and mixed-signal ICs, delivering robust, high-quality designs that meet defined specifications and timelines (55%).
Take ownership of critical chip subsystems and act as technical lead across cross-functional project teams (20%).
Collaborate closely with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to ensure successful product development (10%).
Drive innovation in circuit design and architecture, introducing new ideas and solutions to improve performance and efficiency (5%).
Mentor and support junior engineers or interns, providing technical guidance and fostering team development (5%).
Communicate complex technical concepts clearly through reports and presentations to senior stakeholders (5%).
Minimum Qualifications:
Bachelor’s degree in electrical, electronics, or related Engineering field with 12+ years’ experience in analog IC design within the semiconductor industry.
Deep understanding of CMOS/BiCMOS analog circuit design practices.
Proven experience as a technical lead on chip development projects.
Strong mixed-signal design experience.
Expert proficiency with Cadence design environment, simulation, and verification tools.
Expert proficiency with device modelling (Verilog-AMS, SystemVerilog) and mixed-signal simulation.
Understanding of design for manufacturability (DFM), reliability, and yield optimization.
Solid understanding of mixed-signal design, including parasitic, matching, ESD, latch up, crosstalk, and IR drop.
Experience in chip top level verification and production experience is a plus
Documentation of design results, characterization results and DFMEA
Experience in translating MEMS models into equivalent circuits
Demonstrated innovation and creative problem-solving capabilities.
Analog block and full chip level schematic design, process corner analysis, and post-layout simulation
Block level verification including LVS/DRC/PEX
Fluent in written and spoken English
Desired Qualifications
Postgraduate qualification (MSc or PhD) in a relevant field.
Experience with circuit design in mixed-signal design.
Experience with mixed-signal lab validation techniques and equipment.
Experience in translating haptic actuators model into equivalent circuits is a plus
Familiarity with high voltage and high current ASIC design.
Skills
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