Posted 3 days ago
AMS Verification
AI Summary
Develops and executes verification plans for Analog/Mixed-Signal integrated circuits, creates advanced verification environments using SystemVerilog and UVM, and performs mixed-signal simulations to ensure design functionality and reliability.
About this role
Job Summary:
NXP Semiconductors Netherlands B.V. is seeking a talented and highly motivated AMS Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex Analog/Mixed-Signal (AMS) integrated circuits, ensuring their functionality, performance, and reliability meet stringent product specifications.
Job Responsibilities:
- Develop and execute comprehensive verification plans for Analog/Mixed-Signal (AMS) blocks and systems, including identifying critical design features and potential failure modes.
- Create and maintain advanced verification environments using SystemVerilog, UVM, and other industry-standard methodologies.
- Develop and implement efficient testbenches, test cases, and assertion-based verification (ABV) for AMS designs.
- Perform mixed-signal simulations (e.g., AMS, Spice, Fast Spice) and analyze results to identify and debug design issues.
- Collaborate closely with design engineers to understand architectural specifications and provide feedback on design for verifiability.
- Develop and automate regression testing procedures to ensure continuous verification coverage.
- Generate detailed verification reports, including coverage metrics, bug tracking, and sign-off documentation.
- Participate in design reviews, contributing expertise in verification strategies and methodologies.
- Stay up-to-date with the latest advancements in AMS verification tools and techniques.
Job Qualifications:
- Master's degree or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
- 8+ years of experience in AMS verification for complex ICs.
- Strong understanding of analog circuit design fundamentals (e.g., op-amps, ADCs, DACs, PLLs).
- Proficiency in SystemVerilog and UVM for mixed-signal verification.
- Hands-on experience with mixed-signal simulation tools (e.g., Cadence Virtuoso, Spectre, Xcelium, QuestaSim).
- Experience with scripting languages (e.g., Python, Perl, Tcl) for test automation and data analysis.
- Familiarity with assertion-based verification (ABV) techniques.
- Excellent problem-solving skills and attention to detail.
- Strong communication and interpersonal skills, with the ability to work effectively in a collaborative team environment.
- Experience with version control systems (e.g., Git) is a plus.
- Knowledge of industry standards and methodologies for functional safety (e.g., ISO 26262) is a plus.
Skills
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