Jobless Developer
MPS Hangzhou logo

Posted 23 days ago

Open

Layout Engineer (Junior/New Grad)(Taipei/Hsinchu)

TaipeiRemoteFull-time

AI Summary

A junior layout engineer working on mixed-signal and analog integrated circuits, performing block-level layout, device placement, signal matching, DRC/LVS verification, and chip tapeout.

About this role

Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world ---come join our team and see how YOU can make a difference.

Job Description:

Layout Engineer will work directly and indirectly with Design / CAD / Layout Manager in development of Mixed-Signal and Analog Integrated Circuits. Individual will perform job professionally and independently. The following are the requirements for this job function.

Essential Functions:

  • Layout Schedule Estimation

  • Device Placement on block level according to matching requirements

  • Block implementations on Top Level

  • Signal matching / sensitive nets shielding technique

  • Pad / ESD rule and routing / connection

  • Database DRC & LVS verifications

  • Chip Tapeout in accordance with company’s Tapeout Procedure

  • Positive Attitude

Qualifications:

  • Layout experience in Analog and/or Mixed-Signal Circuit Design

  • Ability to do chip plan, estimate die size and project schedule

  • Ability to resolve DRC & LVS data verification and tape out chip independently

  • Familiarity with fundamentals of analog processes

  • Experience with Cadence and/or VIRTUOSO tools preferable

Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.

Skills

Analog LayoutCadenceChip PlanningDevice PlacementDie Size EstimationDRCESD RulesLVSMixed-signal LayoutSignal MatchingTapeoutVirtuoso

Explore related jobs

Browse these categories

Market data for this role

All reports →