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Omni Design Technologies

Posted 17 months ago

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Senior Analog Design Engineer

HyderabadOn-siteFull-time

AI Summary

Senior analog IC design engineer focused on high-speed SerDes, PLLs, data converters, and related mixed-signal blocks; collaborates with architecture, layout, and verification teams to implement, verify, and validate designs.

About this role

The Senior Analog IC Design Engineer will be working on one or two of the following:
1. high speed SerDes,
2. PLL, Oscillators,
3. PMU,
4. Data Converters

Should be familiar with Analog design for 1 or two of the ares mentioned above

Role and Responsibilities

  • Work with chip/system architecture, physical design, and design teams to implement the SerDes, PLL, ADC, DAC, PMU modules, Data converters
  • Work with the layout team and provide necessary inputs for correctness of high-speed layout
  • Develop and refine specification of the micro-architecture
  • Analyze performance, power and area tradeoffs, and make implementation choices.
  • Work with Architecture and Design teams to ensure micro-architecture and design is fully verified/validated across multiple platforms. Provide high level circuit performance data to architecture team for closing the loop and improving the system models as applicable.
  • Implement, verify, and validate the design.

    • Experience and Qualifications

  • BSEE Required, MSEE Preferred
  • 4+ years of experience in the area of Analog/Mixed Signal Design and verification of silicon
  • Experience with one of in developing, verifying, and productizing SERDES, CDR, and PLL/DLL designs
  • Strong analytical problem solving, and attention to details
  • Excellent technical documentation skills
  • Excellent written and verbal communication skills
  • Excellent interpersonal skills, self-motivated, self-starter

    • Skills

    ADCAnalog IC DesignCDRDACDigital Design Interfaces (as Needed)High-speed Layout InputsLayout CollaborationMicro-architecture SpecificationMixed-signal DesignPLL/DLLPMUPower/area/performance TradeoffsSerdesSilicon VerificationVerificationVerilog-A/AMS (if Used)

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